The concept of feedback signal generators that are both phase- and amplitude-locked was first expounded by Daniel Senderowicz in his 1982 PhD dissertation at U.C. Berkeley, "An NMOS Integrated Vector Lock Loop." An abbreviated form of this work was published by the IEEE in the Proceedings of the 1982 International Symposium on Circuits and Systems, volume 3, pp. 1164-1167.
In the decade since the Senderowicz publications, the vector locked loop has failed to gain widespread acceptance. Indeed, with the exception of a second PhD dissertation (Say, "Vector-Locked Loop Interference Canceller," Polytechnic Institute of New York, 1985), the published literature seems devoid of any subsequent mention of the technology
The particular circuit topology taught by the Senderowicz publications, while advantageous in some respects, limits the circuit's utility and is believed to have contributed to the vector locked loop's lack of widespread acceptance In accordance with the present invention, a more versatile topology is disclosed by which the utility of the VLL is increased and the range of applications in which the circuit may be advantageously employed is expanded.
As an aid in understanding the circuit topology of the present invention, it will be helpful to first detail certain of its mathematical underpinnings.
A vector modulated carrier may be expressed as: EQU V(t)=A(t)cos ].omega.t+.phi.(t)] (1)
where A(t) represents the amplitude modulation function and .phi.(t) represents the phase modulation.
Using complex notation the above expression becomes EQU V(t)=A(t)e.sup.j.phi.(t) e.sup.j.omega.t ( 2)
It is often useful to think of a vector modulated signal in terms of a sum of real and imaginary components: EQU V(t)=[I(t)+jQ(t)]e.sup.j.omega.t ( 3) EQU where: EQU I(t)=A(t)cos [.phi.(t)] (4) EQU and EQU Q(t)=A(t)sin [.phi.(t)] (5)
A vector modulated signal can be expressed graphically as shown in FIG. 1. A vector with amplitude A(t) and angle .phi.(t) is shown to be the sum of two orthogonal vectors I(t) and Q(t). The I-Q method is often used to generate vector modulated signals. Two signals with a phase difference of 90 degrees are generated. Their amplitudes are modulated with I(t) and Q(t) respectively. The two modulated signals are then added together to form the final signal
Another way of representing a vector modulated signal is to express it as the sum of two signals of equal amplitude, but with arbitrary phase. For simplicity, the signals may be assumed to be of unit amplitude
The signal EQU V(t)=A(t)cos [.omega.t+.phi.(t)] (6)
can be expressed as EQU V(t)=cos [.omega.t+.phi.1(t)]+cos [.omega.t+.phi.2(t)] (7) EQU or EQU V(t)=[e.sup.i.phi.1(t) +e.sup.j.phi.2(t) ]e.sup.j.omega.t ( 8)
It can be shown that .phi.1(t) and .phi.2(t) are related to the amplitude and phase of the signal as: EQU .phi.1(t)=.phi.(t)+cos.sup.-1 [A(t)] (9) EQU and EQU .phi.2([t)=.phi.(t)-cos.sup.-1 [A(t)] (10)
The reverse relationships are: EQU .phi.(t)=[.phi.1(t)=.phi.2(t)]/2 (11) EQU and EQU A(t)=2cos{[.phi.1(t)-.phi.2(t)]/2} (12)
FIG. 2 demonstrates that an arbitrary vector with length A(t) and angle .phi.(t) can be represented as the sum of two vectors of equal length and phases .phi.1(t) and .phi.2(t). The length, A(t), of the resultant vector must be less than twice the length of the component vectors. If the two vectors have unit amplitude as in FIG. 2, then: EQU A(t).ltoreq.2 (13)
Again, assuming component vectors of unit length, if the resultant vector has a length of 2, then .phi.1(t) is equal to .phi.2(t). If A(t) is reduced, the two component vectors move apart.
With the foregoing by way of background, it can be seen that a modulation signal of arbitrary magnitude and phase can be produced by combining two signals and controlling their phases in a controlled manner. It is on this principle that the vector locked loop circuit topology of the present invention is based
The features and advantages of the present invention will be more readily apparent from the following Detailed Description thereof, which proceeds with reference to the accompanying drawings.